diff -rbu -X exclude-list gdb-5.0.orig/gdb/arm-tdep.c gdb-5.0/gdb/arm-tdep.c
--- gdb-5.0.orig/gdb/arm-tdep.c	Fri Mar 24 13:33:35 2000
+++ gdb-5.0/gdb/arm-tdep.c	Tue Aug 22 17:23:01 2000
@@ -2031,6 +2031,39 @@
   set_disassembly_flavor (); 
 }
 
+/* Grabbed this code from wince.c/sh-stub.c to allow support for
+   stepping on generic arm targets.  We don't support multiple threads
+   of execution, however, so that code has been removed. */
+
+static int ss_stepped;
+static CORE_ADDR ss_step_pc;
+static unsigned long ss_step_instr;
+static unsigned long ss_step_prev;
+
+/* Single step (in a painstaking fashion) by inspecting the current
+   instruction and setting a breakpoint on the "next" instruction
+   which would be executed.  This code hails from sh-stub.c.
+ */
+void
+arm_software_single_step (unsigned int ignore, int insert_breakpoints_p)
+{
+  unsigned long pc;
+  CORE_ADDR arm_get_next_pc (CORE_ADDR pc);
+
+  if (!insert_breakpoints_p && ss_stepped)
+    {
+      memory_remove_breakpoint (ss_step_pc, (void *) &ss_step_prev);
+      ss_stepped = 0;
+      return;
+    }
+
+  ss_stepped = 1;
+  pc = read_register (PC_REGNUM);
+  ss_step_pc = arm_get_next_pc (pc);
+  ss_step_prev = 0;
+  memory_insert_breakpoint (ss_step_pc, (void *) &ss_step_prev);
+}
+
 void
 _initialize_arm_tdep (void)
 {
@@ -2099,6 +2132,9 @@
 
   add_com ("othernames", class_obscure, arm_othernames,
 	   "Switch to the next set of register names.");
+
+
+  ss_stepped = 0;		/* we're not single-stepping yet */
 }
 
 /* Test whether the coff symbol specific value corresponds to a Thumb
diff -rbu -X exclude-list gdb-5.0.orig/gdb/config/arm/tm-embed.h gdb-5.0/gdb/config/arm/tm-embed.h
--- gdb-5.0.orig/gdb/config/arm/tm-embed.h	Fri Apr  7 15:26:11 2000
+++ gdb-5.0/gdb/config/arm/tm-embed.h	Mon Aug 28 20:34:36 2000
@@ -24,6 +24,14 @@
 /* Include the common ARM definitions. */
 #include "arm/tm-arm.h"
 
+#undef SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP_P 1
+
+#undef SOFTWARE_SINGLE_STEP
+#define SOFTWARE_SINGLE_STEP(sig, bp_p) arm_software_single_step (sig, bp_p)
+
+void arm_software_single_step (unsigned int, int);
+
 /* I don't know the real values for these.  */
 #define TARGET_UPAGES UPAGES
 #define TARGET_NBPG NBPG